Program > Invited Talks

Reliability topics for the qualification of Leading Edge Silicon CMOS Technologies for RF Applications

Fernando Guarín, GlobalFoundries, USA

Up to this point in the evolution of leading edge Silicon CMOS technologies the qualification of the latest nodes has been carried out using the methods and targets dictated by digital/logic applications.  For RF applications the digital centric methodology and metrics will no longer be applicable.  We will discuss the reliability impact and the qualification activities driven by the need to support reliable operation for RF circuit applications.   The CMOS solutions for RF applications include the introduction of SOI that may introduce additional reliability considerations.    The path to maintaining the advanced CMOS scaling cadence and new reliability limiting factors will be examined from the reliability perspective. We will also review the reliability requirements for RF reliability devices and applications as we prepare to introduce technologies to serve the 5G infrastructure requirements. A closer look will be given to Hot Carriers.  The characterization, models and qualification methodologies will be put in the required perspective for the successful qualification and transfer of leading edge technologies to a manufacturing environment.

Dr. Fernando Guarín is a Distinguished Member of Technical Staff at Global Foundries in East Fishkill New York. He retired from IBM’s SRDC after 27 years as Senior Member of Technical Staff.  He earned his BSEE from the “Pontificia Universidad Javeriana”, in Bogotá, Colombia, the M.S.E.E. degree from the University of Arizona, and the Ph.D. in Electrical Engineering from Columbia University, NY He has been actively working in microelectronic reliability for over 35 years.  From 1980 until 1988 he worked in the Military and Aerospace Operations division of National Semiconductor Corporation.  In 1988 he joined IBM’s microelectronics division where he worked in the reliability physics and modeling of Advanced Bipolar, CMOS and Silicon Germanium BiCMOS technologies. He is currently leading the team qualifying GlobalFoundries RF 5G technology offerings. Dr. Guarín is an IEEE Fellow, Distinguished Lecturer for the IEEE Electron Device Society EDS, where he has served in many capacities including;  member of the IEEE’s EDS Board of governors,  chair of the EDS Education Committee, Secretary for EDS. He is the EDS President 2018-2019.

Generalized framework for assessing the reliability of photonic integrated circuits

Paul Leisher, Freedom Photonics LLC, USA

Photonic Integrated Circuits (PICs) are rapidly rising to prominence as core components in a wide variety of applications, including communications, sensing, computing, military, and medical diagnostics systems.  However, generalized methods for long-term reliability prediction, verification, and validation are not yet standardized and many questions remain open.  Generally, each specific PIC design must be thoroughly tested and qualified for use in its operational environment, which can delay development if a design is found to be deficient.  Further, if the simulated environment does not adequately mimic the operational environment, deficiencies may not be detected until after the device is placed into service.  As a result, the incorporation of PICs into many markets is gated by an incomplete understanding of reliability when harsh operating conditions and mission criticality are primary concerns. In this presentation, we will address some of the fundamentals of reliability engineering in the context of photonic integrated circuits, focusing on interaction effects resulting from component integration.  We propose a framework wherein the active and passive components of the PIC are qualified at the component level and system-level reliability methologies (such as reliability block diagramming) are used to establish the reliability of the complete complex PIC system.  Topics of discussion will include reliability test design and methodology, failure analysis, design for reliability considerations, and will highlight some of our recent work in the area.

Dr. Paul O. Leisher is Vice President of Research for Freedom Photonics, LLC in Santa Barbara, CA.  Prior to joining Freedom Photonics, Dr. Leisher was Chief Scientist for Diode Lasers at Lawrence Livermore National Laboratory (Livermore, CA) where he served as the principal subject matter expert for high power diode laser technology and led the diode group in support of several research and development programs. From 2011-2017, Dr. Leisher served as Associate Professor of Physics and Optical Engineering at Rose-Hulman Institute of Technology (Terre Haute, Indiana) and as the Manager of Advanced Technology at nLight Corporation (Vancouver, Washington) from 2007-2011.  He received a B.S. degree in electrical engineering from Bradley University (Peoria, Illinois) in 2002, and a M.S. and Ph.D. in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 2004 and 2007, respectively.  Dr. Leisher’s research interests include the design, fabrication, characterization, and analysis of high power semiconductor lasers and other photonic devices.  He has authored over 230 technical journal articles and conference presentations and served as the principal investigator on approximately 50 funded research projects in the area of photonics and semiconductor laser technology.  Dr. Leisher is a senior member of both SPIE and IEEE.

The ultra-low energy DELTA Scanning Electron Microscope as novel high-sensitivity imaging and spectroscopy tool

Rasmus R. Schröder, BioQuant, Heidelberg University Hospital & Centre for Advanced Materials (CAM), Heidelberg University, Germany

Novel imaging technologies can evolve into important tools for imaging device structure, leading to a better understanding of their function - and their failure.

Here we describe a scanning electron microscope (DELTA SEM) with a completely new electron optical design. It combines spherical (Cs) and chromatic (Cc) aberration correction with unequalled low landing energies (down to 10-20eV). Such low landing energies minimize the interaction volume of the incident electrons and facilitate unsurpassed surface sensitivity. Another unique feature of the DELTA SEM is its electrostatic energy filter which allows electron spectroscopic imaging. This includes spectroscopic imaging of Secondary Electrons (SE) as well as Backscattered Electrons (BSE). As is known from theory SE spectroscopy will allow the imaging of surface potentials, and in addition of work function or electron affinity.

First results also indicate, that BSE spectra carry information about material composition derived from the analogue to the well-known electron energy loss spectroscopy (EELS) in Transmission Electron Microscopy. The new instrument delivers a routine resolution of better than 8Å down to about 200eV landing energy. Even thinnest layers of material can be visualized with high contrast. With such attributes it opens new vistas for SEM and electron spectroscopy in analysis of functional materials’ properties.

After studying physics, theoretical physics, and biology at University of Heidelberg and Trinity College, Dublin, Rasmus Schröder became interested in application of and also methodological developments for electron microscopy. He worked at the Max-Planck Institutes of Medical Research in Heidelberg and Biophysics in Frankfurt, before joining his alma mater in 2008, now as Professor of Cryo Electron Microscopy. At present he is Managing Director of the Centre for Advanced Materials of the University of Heidelberg. Imaging and spectroscopy of beam sensitive samples is the focus of the group, with topics in Structural Biology as well as in Materials Science. Recently the group elucidated the structural mechanism of molecular motor processivity from high resolution 3D reconstructions of cryo samples. Typical examples for work in Materials Science are electron spectroscopic imaging studies on organic solar cells (OSC), which allow the direct visualization of the morphology and materials phase distribution of the different carbon materials in the active layers of OSCs. In the framework of the present “DELTA-project” the group develops a novel analytical Scanning Electron Microscope, for the first time combining aberration correction and electron spectroscopic imaging in a SEM.

Non-Destructive Techniques For Evaluating The Reliability Of High Frequency Active Devices

Jean-Guy Tartarin, LAAS-CNRS, Université Paul Sabatier Toulouse III, France

SiGe and GaN technologies have achieved rapid development over the last two decades. High level of RF circuit integration on Si low cost substrates open the way for large development of SiGe HBTs, while needs for high power density make GaN HEMT a key technology for solid state power modules. As both of these technologies achieve very elevated frequencies, they become strong contenders to GaAs technologies. Then reliability studies are needed to improve the process at the lower technology readiness level scale, and to stabilize the technological process till the final qualification step. To make an efficient diagnostic on the causal origin of the physical root mechanisms involved during the application of a stress, a multi-tool approach is mandatory to secure the diagnostic. In this paper, case studies on SiGe HBT and GaN HEMT stressed devices are proposed through the cross-analysis of low frequency noise spectral densities, of electrical transient measurements, and of TCAD simulations.

J.G. Tartarin was born in Toulouse (France) in 1972. He received the Ph.D. degree in electrical engineering from Paul Sabatier University, Toulouse, France, in 1997. He is a researcher at the Laboratoire d’Analyse et d’Architecture des Systèmes du Centre National de la Recherche Scientifique (LAAS-CNRS), and a full Professor of Electrical Engineering at Paul Sabatier University. His interests are in electrical LF and HF noise measurement and modelling of solid-state microwave and millimeter-wave transistors (HBT, HEMT) on III-V, SiGe and GaN technologies. He is also involved in the design of microwave circuits (MIC and MMIC low noise amplifiers, low phase noise oscillators and multi-function integrated chips), and in reliability analysis of microwave devices. He manages the ‘Noise in devices, circuits and systems’ research activity at LAAS-CNRS; he is also the leader of one of the 3 European Platforms for Low Frequency Noise Measurements in collaboration with Keysight. He is author of more than 20 journal papers, 100 contributions at international conferences and 6 patents.

A Comprehensive Study of Corrosion Mechanisms for Cu-wire on Al Bond Pads

René Rongen, NXP Semiconductors, The Netherlands

Over the past decade, Cu-wire bonding has been gradually industrialized. Meanwhile, it has become a mature technology, also for Automotive Electronics. One of the challenges to overcome, is the enhanced sensitivity for corrosion of the contact between the copper (Cu) ball and the aluminum (Al) bond-pad when compared to gold (Au). This presentation intends to show a comprehensive overview of learnings and findings about corrosion mechanisms in Cu-Al Intermetallic compounds (IMCs). Understanding the Physics-of-Degradation (PoD) for Cu-Al contacts under driving forces from the environment, to mention temperature and humidity, and from the electronic application, which are bias and current, is the backbone of this study. This allows for the development of physical degradation models, which in return is input for acceleration models to be used for reliability stress tests. In addition, the physical and chemical material properties of the epoxy molding compounds (EMCs) are explored, and that can be applied to tune EMC materials for harsh application environments. Finally, it is understood which characteristics of Cu-Al contacts at 0 h (directly after wire bonding) are to be optimized. As a result, life time prediction of electronic devices with Cu-wire is possible, based on the 0 h condition of the IMC contacts, the characteristics of the EMC material used for encapsulation, and the environmental as well as electrical loads in the final electronic application.

René Rongen graduated in Physics at the RWTH Aachen (Germany) in 1992. In 1996 he received his PhD Degree in Physics at the TU Eindhoven (The Netherlands). He joined Philips Semiconductors (NXP Semiconductors since October 2006) in 1997. Currently, he is lead editor of NXP’s Reliability Policy and Requirements, owner of all product reliability test specs in NXP and the NXP Reliability Knowledge Framework. He is actively representing NXP in several industry standardization bodies and industrial forums like AEC, JEDEC and ZVEI. As such, he contributed among others, to the latest revision of AEC-Q100 and -Q006, JESD47 and ZVEI Handbook for Robustness Validation. In addition, he is (co)author of many papers on various topics, including Cu-wire reliability, solder joint reliability and reliability of WL CSP devices. He is regularly visiting reliability relevant conferences and workshops, like IRPS, ESREF, ECTC and AEC-RW, to present papers or as invited speaker. In addition, he is technical committee member for ECTC, ESREF and ESTC.

EMC & ESD from the technology to the system (Challenge, Trends, application cases)

Patrice Besse, NXP Semiconductors, Toulouse

Smart systems with embedded electronics require very high levels of safety and of robustness with secure connections. For instance, the development and the qualification of transportation systems such as electrical vehicles or the autonomous driving function are one of the most exciting challenges faced by the electronic industry. Electronic modules should not create disturbance and should be immune against electrostatic discharge (ESD) and electromagnetic interference (EMI), keeping functions safe when ESD or EMI occur. System and integrated circuits should pass multiple standards to ensure high level of quality and of safety. An optimized system against EMC and ESD request a good match between the different components submitted to fast transient events and to large frequency disturbances. Hence, protection strategies and development methods have been created from the technology to the system. At silicon level different types of technologies are used with specific electrical isolations, moreover dedicated doping profiles can be processed to improve EMC and ESD performance. At each development step, ESD protection techniques and EMC solutions must be fully compatible together and with the rest of the application. An overview of system solutions to pass harsh EMC and ESD standards, considering technologies, design of ICs, packaging, Printed Circuit Board (PCB) with passive elements will be presented.

After his Post-graduation in Compatibility Electromagnetic (EMC), from 2000 to 2004, Patrice was research engineer at Motorola/ LAAS-CNRS  working on ESD (ElectroStatic Discharge) protections for Analog HV technologies. In 2004, he has defended a PhD in ESD and he joined the Analog Design Group of Freescale Toulouse, (France) as ESD engineer. In the last 15 years Patrice lead ESD performance for different businesses with a focus on Automotive applications. Patrice is author or co-author of 31 publications and more than 40 patents in the field of EMC and ESD. He received different awards such as NXP master innovator awards, best paper award EMC Compo 2011. Since a decade, Patrice provides trainings and seminars to conferences and engineering schools and he leads different collaborative research programs. From 2014, Patrice directs EMC & ESD activities within NXP, including definition of technologies, ESD devices libraries, IC design optimization, Lab validation and customer support.